In June I wrote up an analysis of how many AI accelerators China can build in a year. I said the limiting factor (LIMFAC) was the stacked high bandwidth memory (HBM) beside the GPU chip. Three months later Huawei published the architecture of its newest accelerator and its design tells us what Huawei can actually do, not what they say they can do. They will probably say quite a bit at their Huawei Connect conference which opens September 17, 2026. And I wanted to put my analysis on the record before their keynote.
Bottom Line Up Front (BLUF)
China went all in on domestic AI accelerators, and that bet was never on manufacturing the GPU processor itself. The big bet was the memory beside the GPU chip. High-bandwidth memory (HBM) is a stack of memory dies bonded on top of one another. Every AI accelerator designed for LLM training or frontier model inference needs several stacks per package. My June math modeled that China could manufacture enough memory to build 225,000 Huawei Ascend 910C AI accelerators in 2026 (truth in statistics, the model predicted a range of 192,000 to 270,000). The 2026 math hasn’t changed. We just have a little more visibility into Huawei’s direction past 2026.
A bonder is a device which sets one memory die on top of another. You get more memory with taller stacks, and large language models need large memory. But the taller the stack the more chances there are to make a mistake which costs the whole stack. The bonders that build tall stacks at volume come from abroad, and the nearest domestic vendor told its investors in May that no orders had been placed. Huawei’s volume accelerator carries shallow, slow memory. The part that carries the deep and wide memory has been announced and previewed, but is not shipping in volume. They’re building the memory that their tools can bond, not the memory that makes their designs competitive with American AI accelerators.
Even the shallow memory does not cover their all-in bet on Made in China AI hardware. The announced order backlog for Huawei’s volume part alone needs several times everything my model says China can stack in a year. Beijing is behaving as though they will permanently rely on Chinese AI hardware: it has spent the year pointing capital at the infrastructure and forgoing import licences.
Each bar is one announced production target measured against everything my model says China can build in a year. The line at 100 percent is what I think they can build in a year.
Why this matters: the limit on Chinese AI compute is memory packaging, not chip lithography. Export controls aimed at GPU chips are one component away from where the limiting factor is. And China’s announcement of AI accelerator capacity is what they want to buy, not what they forecast they can produce.
The cap only matters because China committed to it so completely that they burned their ships behind them. A business or a country not in great power competition would have taken the American chips Washington offered in January just to buy down risk.
The research data was current as of 2026-09-08. Yuan convert at 6.8 to the dollar throughout.
1. The all-in bet
China went all-in before the flop. Commitment is what makes a memory shortfall incredibly consequential. A country that keeps a foreign supply line open can miss a domestic target and buy their way out of the hole. A country that shuts down imports has to live inside its own production capacity. Beijing chose the second course this year.
Washington allowed GPU exports on January 15, 2026 when licensing for H200-class accelerators moved from presumed denial to case-by-case review. On or about the day before, Chinese customs were told the part was not permitted and firms were told not to buy it. Approvals came around mid-March for about 75,000 units per buyer. By August 18, 2026 ByteDance and Tencent had each taken about 10,000 GPUs, and most of the licensed allowance was being steered to Hong Kong instead of the mainland. The door opened, the customs house shut it, it was reopened a crack, and the buyers bought a little through it. My reading is that a country counting on relief does not slow-roll it at its own border.
A timeline of the GPU imports buying down risk to Huawei AI Accelerator production.
The American offer of Nvidia H200 AI accelerators was the wrong instrument for China anyway. The rule on stacked memory never moved. There was never a fallback on offer for the Chinese LIMFAC. So the memory bet was all-in from the day it was placed.
The money says the same thing. CXMT, the Chinese memory maker my model leans on for nearly all of the domestic stacks, was publicly listed in Shanghai this summer. As part of their IPO, CXMT told the exchange that the raised capital would buy node upgrades on lines it already runs and a forward research platform. In its first written reply to the exchange, in December 2025, it said the projects do not involve any new production line. The registered offering documents commit nothing to memory stacking. Yet roughly RMB 36.8 billion (US$5.4 billion) of the money it raised is committed to nothing at all, and tools are being bought with money the plan does not describe. In September 2025 a special-purpose fund under the third national chip fund took a stake in a domestic maker of bonding equipment, and bonding is the step that limits how tall a memory stack can go. That is Chinese capital buying down their limiting factor. I won’t say that the IPO prospectus looked the other way because I’ve never taken a company public and don’t really know how you decide what to include or leave out in a prospectus.
The left column is the money the IPO prospectus commits and what each project buys; the right is what is being bought with money the prospectus does not describe.
China did not wait long before going all-in. Its buyers took a sliver of the Nvidia cards they were offered. They were never offered HBM so they are buying HBM production capacity. And what they’re capable of producing is not what I thought.
2. The tell
Huawei’s own product line shows which step binds its production capacity. A company can say anything about its supply chain especially when their government will put its thumb on the court system for the company. But the company still has to build what its tools allow so it has something to sell. And when it publishes the architecture of a product it also publishes its own constraints. Huawei published those constraints on June 4, 2026 in the architecture whitepaper for the Ascend 950, and the memory on it is the most honest statement about China’s AI hardware I have read this year.
Start with the shipping AI accelerator. The Ascend 950PR, sold on the Atlas 350 card since March, carries eight memory modules. Huawei calls them modules; the harvest bin on the card divides to exactly the size of a standard stack and the product page says HBM, so I read each module as one stack. The speed is the surprise. Per module, the 950PR’s memory runs at roughly half the bandwidth of an equivalent Samsung part from 2020. That is not a flagship’s memory. It is memory built to be buildable at home: the stack height China’s memory maker already builds, electrically signalled slowly enough to relax the interface and the thermals, and spread across enough modules that the total still looks like an accelerator with Chinese characteristics. I mean, I shouldn’t knock it because I haven’t designed a chip in 25 years.
Now let’s look at the AI accelerator that isn’t shipping yet. The Ascend 950DT is the Huawei headliner: fewer modules, each far deeper and far faster, so that the package carries more memory on fewer stacks. Depth is the tell. A module that deep divides to a stack twelve dies tall, of a denser die, and no Chinese line makes that die at volume or has demonstrated being able to produce that stack in volume. As of this writing the 950DT is announced and cloud-previewed, and Bloomberg reports that memory shortages cap its output this year and leave a single reported DeepSeek order unfilled well into next year.
Put the shipping Huawei 910 and announced 950 side by side and the design tells you where the LIMFAC is. The part Huawei can ship is the one with the short stacks. There is probably a pancake joke in there somewhere. The part it cannot yet ship in volume is the one with the tall (memory) stacks. Definitely a pancake joke. A bonder machine sets one die on top of another, every extra layer is one more placement that can fail and scrap the whole stack with it. And the bonders that do tall stacks at volume are the ones China does not have, cannot yet build, and export controls prevent them from buying. Huawei built the memory its tools can bond, not the memory the design deserves. That is my read of the design, no chip company reverts six years of Moore’s law by choice.
The same accelerator’s memory priced three ways: counted in stacks the tall design looks cheaper, and counted in the dies a bonder places it still looks cheaper. But the yield cost of those twelve-high stack bonds makes them very expensive indeed.
The same Huawei document corrected me on the other half of the package. I published in June that the Ascend 950 was monolithic, and that a monolithic die took advanced packaging out of the LIMFACs. Huawei’s whitepaper shows two compute dies and two input-output (IO) dies in one package beside the memory modules, joined by a die-to-die link, and that requires 2.5D-class assembly, an interposer under several dies. Apparently my microprocessor design college degree did teach me things. Translated back to English, the AI accelerator chip packaging is back to being a Huawei LIMFAC. It does not replace memory as what defines the production ceiling. But the bet now rides on every step of assembly that China does not own at volume, and all of them sit in the package, downstream of the lithography.
TL;DR: All this gets Huawei a part that it can build, it just can’t build enough of them.
3. The flop
The public order backlog runs multiples ahead of production capacity. A small production gap tells a company to expedite. Go faster. Pay overtime. A gap of multiples means that the announcement was never a production forecast; it was a procurement plan, an instruction to the supply chain about what market demand to invest towards. Chinese AI announcements should be read as buyers’ commitment to purchase once the supply is there, which supports investment decisions.
Take the volume part standalone. Huawei’s reported 2026 target for the Ascend 950PR is 750,000 units. Every unit ships the stacks described above with all of the bonder problems and compounding yield math. Run the math and the Huawei 950PR target alone needs about 3.21x of everything China can stack in a year. That is the shallow memory, the memory Huawei pivoted to precisely because it is buildable. Because it’s electrically easier to stack, and they can stack it shorter. The flop moved the target from the memory China cannot yet build to the memory it cannot build enough of. That is progress, not (Nvidia) perfection.
The people who actually buy the memory say the same thing. Chinese accelerator designers file their purchase disclosures with the stock exchange they’re listed on. Enflame’s, filed for IPO this spring, indexes what it paid against 2023. In 2025 it was paying 5.5x the 2023 price for its higher grade of memory, while the chip wafers themselves had fallen to 0.7x cost. It drew down its stockpile of wafers bought in previous years. But it had to pay the price multiple for memory bought through Hong Kong traders. Dishonest (or less than honest) stock exchange filings get you sued, so they put the truth in their corporate filings.
Memory cost vs wafer cost.
Best Arguments Against This
The strongest argument against me is Huawei’s shallow memory itself. My argument’s chokepoint is named for a class of manufacturing tooling: the thermal-compression bonder that stacks HBM-grade memory at volume. No Chinese vendor has yet sold one. If Huawei’s slow memory is slow on purpose, a short stack electrically signalled at last decade’s rates might be bondable on the coarser tools China already holds. Then the chokepoint gates only the 950DT’s tall stacks. The numbers move. This becomes less an argument about hardware and more a model of LLM training and inference speeds. Not something I’m opening in a hardware article today.
The second argument comes from corporate filings about packaging. No Chinese AI accelerator designer ranks memory first among its supply risks; they name wafer foundry, packaging and test, and the Entity List. I don’t know why they don’t list it.
What would change my conclusion. A teardown of an Atlas 350 showing its memory stacked without through-silicon vias, or stacked on a Chinese tool. A full-capacity Ascend 950DT named in a tender or a vendor listing as shipping in volume to a named customer. A domestic bonder vendor, or CXMT, booking HBM-stacking bonder orders with a site and a tool count, or an HBM line funded from the uncommitted IPO raise. And relief on the memory rule itself, when the memory licence exception and next year’s Korean fab licences are decided.
Reading the cards
China’s supply of AI accelerators is defined by the stacked memory it can bond. It’s all about the high bandwidth memory. They burned their ships behind them in pursuit of Made in China AI accelerators (and HBM). And all of the large Chinese AI accelerator order announcements are market signaling so manufacturers can justify committing capital to supply the demand.